Manuscript Number : IJSRST174601
VLSI Architecture for DSP Application
Authors(1) :-Arihant Kr. Jain Most present day arithmetic processors are worked with models that have been settled in the writing, with a considerable lot of the most recent developments dedicated to extraordinary technologies circuits and the utilization of cutting-edge innovations. In particular, the plan of multipliers is basic in digital signal processing applications, where a high number of increases are required. We have limited the number of adders by presenting diverse compressors. The twofold counter property has been converged with the compressor property to grow high request compressors, for example, 5-3 and 7-3 compressors partitioning, simulated annealing, and analytical placement).
Arihant Kr. Jain Compressors, Counters, Xilinx, FPGA Publication Details
Published in : Volume 4 | Issue 6 | March-April 2018 Article Preview
Computer Engineering, Poornima Institute of Engineering & Technology, Jaipur, Rajasthan, India
Date of Publication : 2018-06-30
License: This work is licensed under a Creative Commons Attribution 4.0 International License.
Page(s) : 01-03
Manuscript Number : IJSRST174601
Publisher : Technoscience Academy
Journal URL : https://ijsrst.com/IJSRST174601
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