Modified SVPWM Algorithm for Three Level VSI With Synchronized and Symmetrical Waveforms

Authors

  • Jalla Sowndarya  M.Tech Scholar, Power Electronics and Drives, St.MARK Educational Institution, Soceity Group of Institutions, Anantapur, Andhra Pradesh, India
  • M. Shekar  M.Tech, Assistant Professor, St.MARK Educational Institution Soceity Group of Institutions, Anantapur, Andhra Pradesh, India
  • N. V. Vinay Kumar  M.Tech, Assistant Professor. GATES Engineering College, Gooty, Andhra Pradesh, India

DOI:

https://doi.org//10.32628/IJSRST196249

Keywords:

SVPWM Algorithm, VSI, Symmetrical Waveforms, PWM, SVM, FFT, MCU, EMC, ACIM

Abstract

To generate the required reference vector than triangle comparison based PWM techniques for three-level inverters the space vector based PWM (SVPWM) strategies contain broader choice of switching sequences. This space vector based PWM technique involves in various steps. These steps are computationally exhaustive. The SVPWM has been used in three phase inverter control system. The center-aligned PWM is the most effective way for the Microprocessor Control Unit implementation of the SVPWM, because it can easily generate the center aligned PWM of the multilevel inverters for generation of the signal of space vector pulse width modulation (SVPWM), this concept brings out the method. The inverter leg switching times are generated by this algorithm and middle vector switching times are centered in a sampled interval. The proposed algorithm does not require any sector identification. And it reduces the computational time as a result. The adjacent voltage space vectors are forming the small triangles it is called sectors. Multilevel converters can meet the increasing demand of power ratings and power quality associated with reduced harmonic distortion and lower electromagnetic interference. Furthermore to optimize switching waveforms, space vector pulse-width modulation algorithms offer great flexibility among them. Finally the results are verified through MATLAB/SIMULINK

References

  1. J.-S. Lai and F. Z. peng, “Multilevel converters–A new breed of powe converters,” IEEE Trans. Ind. Appl., vol. 32, no. 3, pp. 509–517, May/Jun. 1996
  2. H. Stemmler, “High-power industrial drives,” Proc. IEEE, vol. 82, pp. 1266–1286, Aug. 1994.
  3. J. K. Steinke, “Switching frequency optimal PWM control of a three level inverter,” IEEE Trans. Power Electron., vol. 7, no. 3, pp. 487–496, Jul. 1992.
  4. G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, “A new multilevel PWMmethod: A theoretical analysis,” IEEE Trans. Power Electron., vol. 7, no. 5, pp. 497–505, Jul. 1992.
  5. Q. Ge, X. Wang, S. Zhang, Y. Li, and L. Kong, “A high power NPC three level inverter equipped with IGCTs,” in Proc. Int. Power Electronand Motion Control Conf. IPEMC, Aug. 14–16, 2004, vol. 3, pp. 1097–1100.
  6. G. Narayanan and V. T. Ranganathan, “Synchronized PWM strategies based on space vector approach. Part 1: Principles of waveform generation,” IEE Proc. Electric Power Appl., vol. 146, no. 3, pp. 267–275, May 1999.
  7. J. H. Seo, C. H. Choi, and D. S. Hyun, “A new simplified space-vector PWM method for three level inverters,” IEEE Trans. Power Electron., vol. 16, no. 4, pp. 545–550, Jul. 2001.
  8. S. Chen and G. Joos, “Symemtrical SVPWM pattern generator using field programmable gate array implementation,” in Proc. IEEE Appl. Power Electron. Conf., 2002, vol. 2, pp. 1004–1010.
  9. S.Wei, B.Wu, and Q.Wang, “An improved space vector PWM control algorithm for multilevel inverters,” in Proc. Int. Power Electron. Motion Control Conf., Aug. 14–16, 2004, vol. 3, pp. 1124–1129.
  10. C. Wang, B. K. Bose, V. Oleschuk, S. Mondal, and J. O. P. Pinto, “Neural-network-based space-vector PWM of a three level inverter covering over modulation region and performance evaluation on induction motor drive,” in Proc. IECON ’03 Conf., Nov. 2–6, 2003, vol. 1, pp. 1–6.
  11. M.-C. Wong, Z.-Y. Zhao, Y.-D. Han, and L.-B. Zhao, “Three-dimensional pulse-width modulation technique in three level power inverters for three-phase four-wired system,” IEEE Trans. Power Electron., vol. 16, no. 3, pp. 418–427, May 2001.
  12. T. Bruckner and D. G. Holmes, “Optimal pulse-width modulation for three level inverters,” IEEE Trans. Power Electron., vol. 20, no. 1, pp. 82–89, Jan. 2005.
  13. N. Celanovic and D. Borojevic, “A comprehensive study of neutral voltage balancing problem in three level neutral point clamped voltage source PWM inverters,” IEEE Trans. Power Electron., vol. 15, no. 2, pp. 242–249, Mar. 2002.
  14. K. Yamanaka, A. M. Hava, H. Kirino, Y. Tanaka, N. Koga, and T. Kume, “A novel neutral point potential stabilization technique using the information of output current polarities and voltage vector,” IEEE Trans. Ind. Appl., vol. 38, no. 6, pp. 1572–1580, Nov./Dec. 2002.
  15. M. Botao, L. Congwei, Z. Yang, and L. Fahai, “New SVPWM control scheme for three-phase diode clamping multilevel inverter with balanced dc voltages,” in IEEE IECON 2002 Conf., vol. 1, pp. 903–907.
  16. H. L. Liu, N. S. Choi, and G. H. Cho, “DSP based space vector PWM for three level inverter with DC-link voltage balancing,” in Proc. IEEE IECON 1991 Conf., vol. 2, pp. 197–203.
  17. S. Busquets-Monge, S. Somavilla, J. Bordonau, and D. Boroyevich, “A novel modulation for the comprehensive neutral-point balancing in the three level NPC inverter with minimum output switching-frequency ripple,” in Proc. IEEE—PESC Conf., Jun. 20–25, 2004, vol. 6, pp. 4226–4232.
  18. J. H. Seo and C. H. Choi, “Compensation for the neutral-point potential variation in three level space vector PWM,” in Proc. IEEE–APEC Conf., 2001, vol. 2, pp. 1135–1140.
  19. H. Zhang, A. Von Jouanne, S. Dai, A. K.Wallace, and F.Wang, “Multilevel inverter modulation schemes to eliminate common-mode voltages,” IEEE Trans. Ind. Appl., vol. 36, no. 6, pp. 1645–1653, Nov.-Dec. 2000.
  20. A. R. Beig, “Application of three level voltage source inverters to voltage fed and current fed high power induction motor drives,” Ph.D. dissertation, Indian Inst. Sci., Bangalore, India, 2004.
  21. Reference Guide TMS320F/C240 DSP Controllers: Peripheral Library and Specific Devices Texas Instruments, 1999.

International Journal of Scientific Research in Science and Technology

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Published

2019-04-30

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Volume 6, Issue 2, March-April-2019

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Research Articles

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How to Cite

[1]
Jalla Sowndarya, M. Shekar, N. V. Vinay Kumar, " Modified SVPWM Algorithm for Three Level VSI With Synchronized and Symmetrical Waveforms, International Journal of Scientific Research in Science and Technology(IJSRST), Online ISSN : 2395-602X, Print ISSN : 2395-6011, Volume 6, Issue 2, pp.246-266, March-April-2019. Available at doi : https://doi.org/10.32628/IJSRST196249