FPGA Implementation of High Performance Entropy Encoder for H.264 Video CODEC

Authors

  • Prajakta Bhagde  Department of VLSI Engineering J IT College of Engineering Nagpur, RTMNU University, India
  • Prof. Anil Bavaskar  Department of VLSI Engineering J IT College of Engineering Nagpur, RTMNU University, India

Keywords:

CAVLC,H.264/AVC, Entropy, MPEG.

Abstract

In information theory an entropy encoding is a lossless data compression scheme that is independent of the specific characteristics of the medium. One of the main types of entropy coding creates and assigns a unique prefix-free code to each unique symbol that occurs in the input. These entropy encoders then compress data by replacing each fixed-length input symbol with the corresponding variable-length prefix-free output codeword. The length of each codeword is approximately proportional to the negative logarithm of the probability. Therefore, the most common symbols use the shortest codes. Context-based adaptive variable-length coding (CAVLC) is an important feature of the latest video coding standard H.264/AVC. Context-adaptive variable-length coding (CAVLC) is a form of entropy coding used in H.264/MPEG-4 AVC video encoding. It is an inherently lossless compression technique, like almost all entropy-coders. In H.264/MPEG-4 AVC, it is used to encode residual, zig-zag order, blocks of transform coefficients. It is an alternative to context-based adaptive binary arithmetic coding (CABAC). CAVLC requires considerably less processing to decode than CABAC, although it does not compress the data quite as effectively. CAVLC is supported in all H.264 profiles, unlike CABAC which is not supported in Baseline and Extended profiles. The coding technique using conventional CAVLC based on area efficient design, the second is on low power design architecture will lead to low throughput. In this project, an efficient CAVLC design is proposed. The main concept is the FPGA based pipelining scheme for parallel processing of two 4x4 blocks. When one block is processed by the scanning engine to collect the required symbols, its previous block is handled by the coding engine to translate symbols into bit stream. Our block based pipelined architecture doubles the throughput of CAVLC at high bit rates.

References

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Published

2017-02-28

Issue

Section

Research Articles

How to Cite

[1]
Prajakta Bhagde, Prof. Anil Bavaskar, " FPGA Implementation of High Performance Entropy Encoder for H.264 Video CODEC, International Journal of Scientific Research in Science and Technology(IJSRST), Online ISSN : 2395-602X, Print ISSN : 2395-6011, Volume 3, Issue 2, pp.188-190, January-February-2017.