High Performance and Area Efficient DSP Architecture using Dadda Multiplier
Keywords:
Carry Save, Modified Booth Multiplier, Dadda Multiplier.Abstract
Modern embedded structures required to implement high-end software domain in Digital Signal Processing (DSP). Now-a-days multipliers and DSP functions plays significant role to do fast computations. The efficient DSP functions are implemented by adopting the functions of flexible data path architecture with Modified Booth (MB) multiplier using Carry save arithmetic adder from previous works and now it was extended with Dadda multiplier using CS (Carry Save). In this architecture the structure comprising of flexible computational unit (FCU) in Dadda multiplier with CS to perform fast DSP functions. The flexible DSP functions used to increase the performance by reduce the area, power and delay with carry save arithmetic level abstraction entity were proposed. The FCU architecture design of Dadda multiplier with CS results considerable compressions in power, area and combinational path delay as 12.7%, 4.8%, and 3.9% respectively compared with the MB multiplier with CS.
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