Design and Implementation of High Speed Area Efficient Carry Select Adder Using Spanning Tree Adder Technique

Authors

  • Hima Bindu Vykuntam  M. Tech Student VLSI-SD, Department of ECE, ST Johns College of Engineering and Technology, Kurnool, Andhra Pradesh, India
  • M. Chennaiah  Assistant Professor, Department of ECE, ST Johns College of Engineering and Technology, Kurnool, Andhra Pradesh, India
  • K. Sudhakar  H.O.D, Associate Professor, Department of ECE,ST Johns college of Engineering and Technology, Kurnool, Andhra Pradesh, India

DOI:

https://doi.org/10.32628/IJSRST184114

Keywords:

Parallel prefix adders, Spanning Tree (ST) adder, Brent Kung (BK) Adder, Carry Select Adder (CSLA)

Abstract

In this paper, we propose Carry Select Adder (CSLA) architecture with parallel prefix adder. Instead of using 4-bit Brent Kung Adder (BKA), another parallel prefix adder i.e., 4-bit spanning Tree (ST) adder is used to design CSA. Because Adders are key element in digital design, which are not only performing addition operation, but also many other function such as subtraction, multiplication and division. A Ripple Carry Adder (RCA) gives the most complicated design as-well-as longer computation time so that we may gone for parallel prefix adders. This time critical application we use Spanning tree parallel prefix adder to drive fast results but they lead to increase in area. Proposed Carry Select Adder understands between RCA and BKA in term of area and delay. Delay of Existing adders is larger therefore we have replaced those with Brent Spanning Tree parallel prefix adder which gives fast result. This paper describes comparative performance of 4-bit RCA and 4-Bit BK parallel prefix adders with Our Proposed Spanning Tree adder based carry select adder designed using Xilinx ISE tool.

References

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International Journal of Scientific Research in Science and Technology

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Published

2018-11-30

Issue

Volume 4, Issue 11, November-December-2018

Section

Research Articles

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This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
Hima Bindu Vykuntam, M. Chennaiah, K. Sudhakar "Design and Implementation of High Speed Area Efficient Carry Select Adder Using Spanning Tree Adder Technique " International Journal of Scientific Research in Science and Technology(IJSRST), Online ISSN : 2395-602X, Print ISSN : 2395-6011,Volume 4, Issue 11, pp.21-26, November-December-2018. Available at doi : https://doi.org/10.32628/IJSRST184114