An Efficient Reversible PLA Implemented In BIST for More Fault Coverage
Keywords:
Reversible Logics, PLA, ESOP,BISTAbstract
Reversible logics are one of the most vital logics in present and it has different areas for its application ,those are low power CMOS, quantum computing, nano technology,digital signal processing etc., Logic synthesis for reversible logic differs considerably from standard logic synthesis. Reversible logic has been motivated by consideration of zero-energy computation thus it reduces the power utilization. A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits,Re- conFigure urability and structural regularity of Programmable Logic Devices caused wide use of it by the logic designers. Here in this paper we propose a design algorithm for a PLA with a newly designed low cost 3×3 reversible NMG circuit for implementing multi-output ESOP (Exclusive-OR Sum of Product) functions. In addition to this work is to make the design efficient reversible PLA implemented in built in self test (BIST) to enhancing the testing properties like power, fault coverage. The total work has been implemented in Xilinx 14.3 tool using verilog code.
References
- R. Landauer,"Irreversibility and heat generation in the computing process." IBM J. Res. Dev., vol.5,no. 3, pp. 183-191, 1961.
- C.H. Bennett,"Logical reversibility of computation". IBM J. Res. Dev. vol.17, no. 6, pp. 525-532, 1973.
- G.Schrom and S.Selberherr .Ultra-low-power cmos technology .In Semiconductor Conf, Romania, 2002. E. Knill, R. Laamme, and G. J. Milburn .A scheme foreseen quantum computation with linear optics. Nature, 409:46–52, January 2001.
- M.A .Nielsen and I.L. Chuang .Quantum computation and quantum information, 2001.
- R. C. Merkle. Two types of mechanical reversible logic. Nanotechnology, 4(2):114–131, January 1993.
- H .Fleisher and L. I. Maissel .An introduction to array logic. IBM J .of Research and Development, 19, 1975.
- T. Sasao. Exmin2: A simplification algorithm for exclusive-or-sum-of-products expressions for multiple-valued input two-valued output functions. IEEE Transactions on Computer-Aided Desig n of Integrated Circuits and Systems, 12(5):621–632, 1993.
- A. Mishchenko and M. Perkowski .Logic synthesis of reversible wave cascades. In International Workshop on Logic Synthesis, pages 197–202, June 2002.
- M. Perkowski, A. B. P. Kerntof and et al. Regularity and symmetry as a base of efficient realization of reversible logic circuits. In International Workshop on Logic Synthesis, pages 245–252, June 2001.
- D. Maslov and G. Dueck. Reversible cascades with minimal garbage. IEEE Transactions on CAD, 23(11):1497–1509, November 2004.
- A .R. Chowdhury, R. Nazmul, and H. M. H.Babu."A new approach to synthesize multiple-output functions using reversible programmable logic arrays" In IEEE 19rd International Conf. on VLSI Design, pages 311–316, Hyderabad, India, 2006
- R. Rahman, L. Jamal and H.M.H. Babu, "Design of Reversible Fault Tolerant Programmable Logic Arrays with Vector Orientation", Interna-tional Journal of Information and Communication Technology Research, pp. 337-342, 2011
- S.K. Mitra, L. Jamal, Mineo Kaneko and H.M.H. Babu,"Design and Minimization of Reversible Programmable Logic Arrays", Proc. of Symposium on VLSI,GLSVLSI’12, NY, USA, pp. 215-220, 2012.
- Robert Treuer, Vinod K. Agarwal, Hideo Fujiwara "A New Built-In Self-Test Design for PLA's with Hligh Fault Coverage and Low Overhead"IEEE Transactions on ComputersVolume 36 Issue 3
- C.Y. Liu, K. K. Saluja, J.S. Upadhyaya "BIST-PLA: a built-in self-test design of large programmable logic arrays"DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
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