A Control Method for Voltage Oscillation Suppression Using Neutral-Point-Clamped Inverter

Authors

  • Suresh. C  Assistant Professor, Department of EEE, Narasu's Sarathy Institute of Technology, Tamil Nadu, India
  • Tamilarasu. M  Student, Department of EEE, Narasu's Sarathy Institute of Technology, Tamil Nadu, India
  • Loganathan. R  Student, Department of EEE, Narasu's Sarathy Institute of Technology, Tamil Nadu, India
  • Vikash. K  Student, Department of EEE, Narasu's Sarathy Institute of Technology, Tamil Nadu, India
  • Vignesh. M  Student, Department of EEE, Narasu's Sarathy Institute of Technology, Tamil Nadu, India

Keywords:

NPC, Oscillation Suppression, Modulation Index, THD, Discontinuous pulse width modulation (DPWM), Low frequency oscillation, Neutral-point voltage balancing,

Abstract

The major problem in the electrical power quality is the harmonic content. There are several methods indicating the quantity of harmonic content and the most widely used measure is the Total Harmonic Distortion. If total capacitance of DC-link capacitor is smaller, the amplitude of oscillation is larger. In this paper, three-level neutral-point-clamped inverter system is analyzed by the small-signal modeling and the control method reducing the oscillation of the neutral-point voltage is proposed. By the proposed method, the amplitude of the neutralpointvoltage oscillation is reduced. A nine level cascaded multilevel inverter power circuit is simulated in MATLAB simulink with sinusoidal PWM technique. The results are presented and analyzed.

References

  1. MEENAKSHI, J. ; SREEDEVI, V.T, “Simulation of a transistor clamped H-bridge multilevel inverter and its comparison with aconventional H-bridge multilevel inverter” IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), 2014 , 20-21 March 2014
  2. Kumar, D.V.A. ; Babu, C.S. “New multilevel inverter topology with reduced number of switches using advanced modulation strategies”IEEEInternational Conference on Power, Energy and Control (ICPEC), 2013 pages 693 – 699.
  3. Haiwen Liu, Leon M. Tolbert, SurinKhomfoi, BurakOzpineci, Zhong Du, “ Hybrid Cascaded Multilevel Inverter with PWM control Method”, conference and proceedings , pp: 162-166 , June 2008.
  4. P.C. Loh, D.G. Holmes, T.A. Lipo, “Implementation and control of distributed PWM cascaded multilevel inverter with minimum harmonic distortion and common moode voltages”, IEEE Transactions on Power Electronics, vol. 20, no. 1, pp. 90-99 , Jan. 2005.
  5. Chiasson, J.N.; Tolbert, L.M.; McKenzie, K.J.; ZhongDu,“A Unified approach to solving the harmonic Elimination Equation in multilevel converters”, IEEE Transactions On Power Electronics, Vol. pp: 478 – 490, March 2004
  6. B. P. McGrath and D. G. Holmes, “Multicarrier PWM Strategies for multilevel inverters,” IEEE Trans. Ind. Electron. vol. 49, no. 4, pp. 858–867, Aug. 2002.
  7. Leon M. Tolbert, Senior member, IEEE, Fang ZhengPeng, Senior Member,IEEE, and Thomas G. Habetler, Senior Member, IEEE, “ Multilevel PWM methods at Low modulation Indices” , IEEE Transactions On power Electronics, Vol. 15, No. 4,July 2000.
  8. L.M.Tolbert and T.G.Habetler, “Novel Multilevel Inverter Carrier Based PWM methods”, Proc.IEEE trans. Ind Applications, Vol.35, pp. 1098-1107, Sept.1999.
  9. G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, “A new multilevel PWM method: A theoretical analysis,” IEEE Trans. Power Electron., vol. 7, pp. 497–505, July 1992.
  10. N.S. Choi, J. G. Cho, and G.H. Cho, “A general circuit topology of multilevelinverter,” in Proc. IEEE PESC’91, pp. 96-103.
  11. C. K. Duffey, R. P. Stratford, “Update of harmonic standard IEEE-519, IEEE recommended practices and requirement for harmonic control in electric power systems,” IEEE Transactions on Industry Applications, vol. 25, no. 6, pp.1025-1034,Nov. /Dec. 1989.
  12. S. Walfram, Mathematica, a System for Doing Mathematics by Computer, 2nd ed. Reading MA: Addison-Wesley, 1992.
  13. H. S. Patel and R. G. Hoft, “Generalized harmonic elimination and voltage control in thyristor converters: Part I-harmonic elimination,” IEEE Trans. on Ind. Appl., Vol. 9, pp. 310-317, May/June 1973.
  14. H. S. Patel and R. G. Hoft, “Generalized harmonic elimination and voltage control in thyristor converters: Part II-voltage control technique,” IEEE Trans. on Ind. Appl., Vol. 10, pp. 666-673, Sept. /Oct. 1974.
  15. N. Mohan, T. M. Undeland and W. P. Robbins, 2003 -Power Electronics: Converters , Applications, and Design, 3rd Edition. J. Wiley and Sons.
  16. Khomfoi, S., Tolbert, L. M., “Fault Diagnostic System for a Multilevel Inverter Using a Neural Network”, in IEEE Transactions on Power Electronics, Vol. 22, No. 3,pp. 1062-1069, May 2007.

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Published

2021-04-10

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Section

Research Articles

How to Cite

[1]
Suresh. C, Tamilarasu. M, Loganathan. R, Vikash. K, Vignesh. M, " A Control Method for Voltage Oscillation Suppression Using Neutral-Point-Clamped Inverter , International Journal of Scientific Research in Science and Technology(IJSRST), Online ISSN : 2395-602X, Print ISSN : 2395-6011, Volume 9, Issue 1, pp.993-999, March-April-2021.