Design and Implementation of High Speed Dadda Multiplier with Parallel Gates

Authors

  • Narsing Ashok  J.B.Institute of engineering & Technology. Bhaskar nagar, yenkapally, moinabad(m), Rangareddy (dist.), Hyderabad, Telangana, India
  • K. Snehalatha   Associate Professor M. E. (E&C) M. Tech. (WMC), J.B.Institute of engineering & Technology. Bhaskar nagar, yenkapally, moinabad(m), Rangareddy (dist.), Hyderabad, Telangana, India

Keywords:

Inexact Wallace tree multipliers, Baugh-Wooley algorithm, inexact 4:2 compressor, reversible logic, image processing, wavelet transform, convolutional neural networks

Abstract

The inexact 4:2 compressor proposed in this study has a unique architecture that is optimized for realization using reversible logic. It also includes an inexact Baugh-Wooley Wallace tree multiplier. Measured in scales of Gate Count (GC), Quantum Cost (QC), Garbage Output (GO), and Ancilla Input, the effectiveness of the suggested reversible logic-based realization of the inexact 4:2 compressor and Baugh-Wooley Wallace tree multiplier is examined (AI). This paper proposes an implementation of an 8 8 Baugh-Wooley Wallace tree multiplier. The accuracy metrics MED and MRED are measured for the proposed multiplier and is found to be the least among existing inexact compressor-based multiplier designs.

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International Journal of Scientific Research in Science and Technology

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Published

2022-12-30

Issue

Volume 9, Issue 6, November-December-2022

Section

Research Articles

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How to Cite

[1]
Narsing Ashok, K. Snehalatha "Design and Implementation of High Speed Dadda Multiplier with Parallel Gates" International Journal of Scientific Research in Science and Technology(IJSRST), Online ISSN : 2395-602X, Print ISSN : 2395-6011,Volume 9, Issue 6, pp.207-214, November-December-2022.