Study of Operational Amplifier Test Procedure and Methods

Authors

  • Kumari Archana  Research Scholar, Department of Physics, J. P. University, Chapra, Bihar, India
  • Pramendra Ranjan Singh  Principal, Narayan College Goryakothi, Siwan, J. P. University, Chapra, Bihar, India

DOI:

https://doi.org/10.32628/IJSRST229247

Keywords:

High Gain Op Amp, Low Power Op Amp, Compensation Techniques.

Abstract

In this paper, we present about the study of operational amplifier test procedure and methods. Operational Amplifiers (Op-amps) are one of the most widely used building blocks for analog and mixed-signal systems. They are employed from dc bias applications to high-speed amplifiers and filters. General purpose op-amps can be used as buffers, summers, integrators, differentiators, comparators, negative impedance converters, and many other applications. The two-pole model widely used in the test analysis to assess the parameters of an op amp is not accurate and may be unsuitable for gain boosting op amp designs. A more complex model with more than two poles may require tedious analysis and a large amount of calculation. Most reported op amp measurement methods require a complicated test circuit, delicate calibration, and sophisticated test instrumentation. The practical bench test of the open loop gain along with other op amp characteristics are addressed alsoin this paper.

References

  1. Y. Taur, “Cmos design near the limit of scaling,” IBM Journal of Research and Development, vol. 46, no. 2/3, pp. 213-222, March/May 2002.
  2. D. J. Comer and D. T. Comer, “Using the weak inversion region to optimize input stage design of CMOS op amps,” Circuits and Systems II: Express Briefs, vol. 51, no. 1, pp. 8-14, Jan. 2004.
  3. P. Gray and R. Meyer, “Recent advances in monolithic operational amplifierdesign,” IEEE Transactions on Circuits and Systems, vol. CAS-21, no. 3, pp.317-327, May 1974.
  4. D. Johns and K. Martin, Analog Integrated Circuit Design. New York: JohnWiley & Sons, Inc., 1996.
  5. J. Huijsing, R. Hogervorst, and K.-J. de Langen, “Low-power low-voltage vlsioperational amplifier cells,” IEEE Transactions on Circuits and Systems, vol. 42,no. 11, pp. 841-852, Nov. 1995.
  6. P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 2nd Ed. NewYork: Oxford University Press, 2002.
  7. W. Black, D. Allstot, and R. Reed, “A high performance low power CMOSchannel filter,” IEEE J. Solid-State Circuits, vol. SC-15, no. 6, pp. 929-938,Dec. 1980.
  8. A. L. Coban and P. E. Allen, “A 1.75 v rail-to-rail CMOS op amp,” Proc. OfIEEE International Symposium on Circuits and Systems, vol. 5, pp. 497-500,Jun. 1994.
  9. R. G. Eschauzier, R. Hogervorst, and J. H. Huijsing, “A programmable 1.5 vCMOS class-ab operational amplifier with hybrid nested miller compensationfor 120 db gain and 6 mhzugf,” IEEE J. Solid-State Circuits, vol. 29, no. 12,pp. 1497-1504, Dec. 1994.
  10. J. Purcell and H. S. Abdel-Aty-Zohdy, “Compact high gain CMOS op amp design using comparators,” Proceedings of the 40th IEEE Midwest Symposium onCircuits and Systems, vol. 2, pp. 1050-1052, Aug. 1997.

International Journal of Scientific Research in Science and Technology

Downloads

Published

2022-04-30

Issue

Volume 9, Issue 2, March-April-2022

Section

Research Articles

License

Copyright (c) IJSRST

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
Kumari Archana, Pramendra Ranjan Singh "Study of Operational Amplifier Test Procedure and Methods" International Journal of Scientific Research in Science and Technology(IJSRST), Online ISSN : 2395-602X, Print ISSN : 2395-6011,Volume 9, Issue 2, pp.272-278, March-April-2022. Available at doi : https://doi.org/10.32628/IJSRST229247