Low Power Design of MIPS RISC Processor
Keywords:
MIPS, reversible logic, VHDL, control unit, datapath unitAbstract
The aim of the paper is to design a reversible control unit for 32 bit RISC processor using VHDL code. RISC or Reduced Instruction Set Computer is a design philosophy that has become a mainstream in scientific and engineering applications. Increasing performance and gate capacity of recent FPGA devices permits complex logic systems to be implemented on a single programmable device. Low power design of MIPS processor involves the use of reversible logic based design. The circuit of control unit is synthesized using Xilinx ISE. The parameters such as power and delay are estimated. The work is proceeded with the reversible logic based implementation.
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